FCAL_COMP_INV=0, FCAL_SMP_DLY=00, FCAL_RUN_CNT=0, AUXPLL_DAC_CAL_ADJUST_DIS=0
Aux PLL Frequency Calibration Control
| DAC_CAL_ADJUST_MANUAL | Aux PLL Frequency DAC Calibration Adjust Manual value |
| AUXPLL_DAC_CAL_ADJUST_DIS | Aux PLL Frequency Calibration Disable 0 (0): Calibration is enabled 1 (1): Calibration is disabled |
| FCAL_RUN_CNT | Aux PLL Frequency Calibration Run Count 0 (0): Run count is 256 clock cycles 1 (1): Run count is 512 clock cycles |
| FCAL_COMP_INV | Aux PLL Frequency Calibration Comparison Invert 0 (0): (Default) The comparison associated with the count is not inverted. 1 (1): The comparison associated with the count is inverted |
| FCAL_SMP_DLY | Aux PLL Frequency Calibration Sample Delay 0 (00): The count signal is sampled 1 clk cycle after fcal_run signal is deasserted 1 (01): The count signal is sampled 2 clk cycle after fcal_run signal is deasserted 2 (10): The count signal is sampled 3 clk cycle after fcal_run signal is deasserted 3 (11): The count signal is sampled 4 clk cycle after fcal_run signal is deasserted |
| DAC_CAL_ADJUST | Aux PLL DAC Calibration Adjust value |